Couverture / Jaquette

. System on Chip Interfaces for Low Power Design provides a top-down understanding of interfaces available to SoC developers, not only the underlying protocols and architecture of each, but also how they interact and the tradeoffs involved. The book offers a common context to help understand the variety of available interfaces and make sense of technology from different vendors aligned with multiple standards. With particular emphasis on power as a factor, the authors explain how each interface performs in various usage scenarios and discuss their advantages and disadvantages. Readers learn to make educated decisions on what interfaces to use when designing systems and gain insight for innovating new/custom interfaces for a subsystem and their potential impact.

Note biographique

Sanjeeb Mishra is a Validation Architect with Intel. He has 15 years of experience ranging from hardware system design to SOC validation for telecom, consumer electronics, PC and mobility products; and has specific expertise on SoC architecture for mobile devices.

Table des matières

1. SoC Design Fundamentals and Evolution
2. Understanding Power Consumption Fundamentals
3. Generic SoC Architecture and Components
4. Display Interfaces
5. Multimedia Interfaces
6. Communication Interfaces
7. Memory Interfaces
8. Security Interfaces
9. Power Interfaces
10. Sensor Interfaces
11. Input Device Interfaces
12. Debug Interfaces

Appendix A: USB3.0Appendix B: Industry ConsortiumsAppendix C: Overview of Intel SoC: Baytrail

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